In the field of electronic packaging and, in particular, the field of integrated circuit (IC) chip interconnection, the desirability of incorporating high input/output (I/O) capability and short IC interconnects typically has led to the adoption of the flip-chip technique of IC chip interconnection. Generally, the flip-chip technique involves electrically interconnecting an IC chip and a substrate with the use of solder joints, which are disposed between the IC chip and the substrate.
It is also known in the prior art to fill the spaces or gaps remaining between an IC chip and substrate, which are not occupied by solder, with an underfill composition or encapsulant. The encapsulant may be an adhesive which serves to reinforce the physical and mechanical properties of the solder joints between the IC chip and the substrate. The encapsulant typically not only provides fatigue life enhancement of a packaged system, but also provides corrosion protection to the IC chip by sealing the electrical interconnections of the IC chip from moisture.
WO 2005/086532 discloses various packaging solutions for microstructure elements such as integrated circuit chips and microelectromechanical device chips.
US 2006/0008098 discloses a single crystal silicon micro-machined capacitive microphone. Capacitive elements of the single crystal silicon microphone are made up of two epitaxial single crystal silicon layers.
The article “Reliability study and failure analysis of fine pitch solder bumped flip chip on low-cost printed circuit board substrate”, by Guo-wei Xiao, et al., 2001 Proceedings of the Electronic Components and Technology Conference, New York, Ny: IEEE, US, ISBN 0-7803-7038-4, deals with electrically interconnection of an IC chip with a low-cost printed circuit board substrate using flip-chip on board, FCOB, technology U.S. Pat. No. 6,522,762 discloses a silicon microphone assembly formed as a so-called “chip-scale package”. The silicon microphone assembly comprises a microelectromechanical (MEMS) transducer die, a separate integrated circuit die and a silicon carrier substrate with through holes formed therein. The MEMS transducer die and the integrated circuit are adjacently positioned and both attached to an upper surface of the silicon carrier substrate by flip chip bonding through respective sets of bond pads. U.S. Pat. No. 6,522,762 also discloses an example of a chip-scale package, wherein an underfill or glue is provided for filling out spaces or gaps between the transducer die and the silicon carrier substrate and between the integrated circuit and the silicon carrier substrate.
However, because the coefficient of thermal expansion (CTE) of silicon is 3 ppm/° C. and commercially available underfill agents have CTEs of about 40 ppm/° C. or higher, these underfill agents are not well-adapted for use in microphone assemblies that comprise a silicon or MEMS based transducer. The difference in CTE between the underfill agent and silicon based components of the microphone assembly leads to a number of significant problems including:
(i) warping of the substrate wafer due to CTE induced stress will cause problems with wafer dicing after assembly of the individual MEMS microphone packages on the substrate wafer;
(ii) reliability issues such as strain fatigue caused by thermal mismatches of materials in the microphone assembly itself,
(iii) change of the microphone performance due to non-completed curing processes;
(iv) change of the electroacoustical microphone performance such as frequency response and sensitivity during heating of the microphone assembly, for example during reflow soldering in SMT assembly or in connection with high temperature exposure in normal use, caused by thermal mismatches of the materials.
Therefore, there is a need to provide an improved microphone assembly which comprises a suitably disposed underfill agent with a CTE that provides an improved match for the CTE of silicon or MEMS based transducers contained in the microphone assembly.